A key step in SII high frequency performance designs, Signal Integrity engineering first simulates a socket pin layout configuration, cavity design and pin to establish a design and socket materials will perform. We use Ansys HFSS and Simbeor THz to establish the pin and socket insertion and return loss, cross talk and impedance will correspond to the customers expected performance.
Socket simulations also help us understand improvements in cavity design, material selection for the socket, base and pin plates, dielectric constant and diffusion. Socket cross talk baselines are established for NEXT and FEXT and the designer can determine if isolation and impedance tuning or impedance control are required to meet the design goals for the socket.
Socket S-Parameter files
S-parameter files from the socket simulation are available for .2sp (single ended) or .4sp (Differential) performance. We also provide .2sp and .4sp s-parameter files for all our measured pins ins GSG and GSSG configurations.